doi: 10.7763/IJAPM.2012.V2.73
TCAD Simulation of Digital Logic Gates in Independent Double Gate Transistors – A Comparative Study between Conventional and Junctionless FETs
Bhima Harsha
1
,
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- 1 IT Department, SSN college of Engineering, Kalavakkam, Chennai
- 2 MCA Department, SSN college of Engineering, Kalavakkam, Chennai.
Abstract
In this work, conventional independent double gate structure and Junctionless independent double gate structure-based inverters and NAND gates are studied and compared using TCAD simulation. The Junctionless device-based circuits show a larger delay with smaller dynamic power whereas the conventional device-based circuits show smaller delay with larger dynamic power which is a simple power-delay trade-off.
Keywords
- Junctionless FET
- FinFET
- NAND
- inverter
- TCAD
How to Cite
Bhima Harsha, K. K. Nagarajan, and R. Srinivasan, "TCAD Simulation of Digital Logic Gates in Independent Double Gate Transistors – A Comparative Study between Conventional and Junctionless FETs," International Journal of Applied Physics and Mathematics, vol. 2, no. 3, pp. 149-151, 2012. https://doi.org/ 10.7763/IJAPM.2012.V2.73
Copyright & License
Copyright © 2012 by the authors. This is an open access article distributed under the Creative Commons Attribution License which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited (CC BY 4.0).